Motorola DSP96002 User Manual page 313

FJScc Floating-Point Jump To Subroutine
Operation:
If cc, then PC SSH; SR
else PC+1 PC
If cc, then PC SSH; SR
else PC+1 PC
Description:
If the specified floating-point condition is true, the address of the instruction immediately following the
FJScc instruction and the status register are pushed onto the stack. Program execution then continues at
the effective address in program memory. If the specified condition is false, the PC is incremented and
any extension word is ignored. However, the address register specified in the effective address field is
always updated independently of the condition. All memory alterable addressing modes may be used for
the effective address. A fast Short Jump addressing mode may also be used. The 15-bit data is sign ex-
tended to form the effective address. See Section A.10 for restrictions. Non-aware floating-point condi-
tions set the SIOP flag in the IER and the UNCC bit in the ER if the NAN bit is set. This action occurs before
stacking the status register when the specified non-aware floating-point condition is true.
"cc" may specify the following conditions:
Mnemonic
EQ - equal
ERR - error
GE - greater than or equal
GL - greater or less than
GLE - greater, less or equal
GT - greater than
INF - infinity
LE - less than or equal
LT - less than
MI - minus
NE(Q) - not equal
NGE - not(greater than or equal)
NGL - not(greater or less than)
NGLE - not(greater, less or equal)
NGT - not greater than
NINF - not infinity
NLE - not(less than or equal)
NLT - not less than
OR - ordered
PL - plus
UN - unordered
Note: The operands for the ERR condition are taken from the ER register.
* See the description of the UNcc bit in Section A.4.
CCR Condition Codes: Not affected.
MOTOROLA
Conditionally
SSL; xx PC
SSL; ea PC
Condition
Z = 1
UNCC v SNAN v OPERR v No
NAN v (N & ~Z) = 0
NAN v Z = 0
NAN = 0
NAN v Z v N = 0
I = 1
NAN v ~(N v Z) = 0
NAN v Z v ~N = 0
N = 1
Z = 0
NAN v (N & ~Z) = 1
NAN v Z = 1
NAN = 1
NAN v Z v N = 1
I = 0
NAN v ~(N v Z) = 1
NAN v Z v ~N = 1
NAN = 0
N = 0
NAN = 1
DSP96002 USER'S MANUAL
Assembler Syntax:
FJScc label (short)
Non-aware
Set UNCC*
OVF v UNF v DZ = 1
FJScc
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
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