Motorola DSP96002 User Manual page 513

32-bit digital signal processor
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The term "2 * ap" comes from the two instruction fetches done by the RTS/RTR/RTI instruction to refill the
pipeline.
A.9.12
Addressing Mode Timing Summary
Figure A-19 Addressing Mode Timing Summary
MOTOROLA
Effective Addressing Mode
Address Register Indirect
No Update
Postincrement by 1
Postdecrement by 1
Postincrement by Offset Nn
Postdecrement by Offset Nn
Indexed by Offset Nn
Predecrement by 1
Long Displacement
PC Relative
Long Displacement
Short Displacement
Address Register
Special
Immediate Data
Absolute Address
Immediate Short Data
Short Jump Address
Absolute Short Address
I/O Short Address
Implicit
DSP96002 USER'S MANUAL
+ ea
+ ea
Words
Cycles
0
0
0
0
0
0
0
0
0
0
0
2
0
2
1
4
1
2
0
0
0
0
1
2
1
2
0
0
0
0
0
0
0
0
0
0
A - 325

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