Motorola DSP96002 User Manual page 346

32-bit digital signal processor
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FNEG.X
Operation:
0 - D
D
(parallel data bus move)
Description:
Subtract the destination operand D from zero and store the result in the destination operand D.
Input Operand(s) Precision: SEP Floating-Point.
Output Operand Precision: SEP Floating-Point.
CCR Condition Codes:
C
V
Z
N
I
LR
R
A
ER Status Bits:
INX
DZ
UNF
OVF
OPERR-Always cleared.
SNAN -Set if operand is a signaling NaN. Cleared otherwise.
NAN
UNCC -Always cleared.
IER Flags: Flags changed according to standard definition.
Instruction Format: FNEG.X D (move syntax - see the MOVE instruction description.)
31
DATA BUS MOVE FIELD
OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA
A - 158
Negate
- Not affected.
- Not affected.
- Set if result is zero. Cleared otherwise.
- Set if result is negative. Cleared otherwise.
- Set if result is infinity. Cleared otherwise.
- Not affected.
- Not affected.
- Not affected.
-Always cleared.
-Always cleared.
-Always cleared.
-Always cleared.
-Set if result is a NaN. Cleared otherwise.
DSP96002 USER'S MANUAL
Assembler Syntax:
FNEG.X D
(move syntax - see the MOVE instruction descrip-
tion.)
14 13
10
0001
FNEG.X
0
uu00
0ddd
MOTOROLA

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