Data Organization In Registers; Data Alu Registers - Motorola DSP96002 User Manual

Normalized Numbers:
Represents real numbers in the form (-1) s x 2 (E+1023) x 1.f
E ........................ unbiased exponent -1022 < E < +1023
Bias of e .............. +1023 ($3FF)
e + E + bias ...................... 0 < e < 2046 ($7FE)
f ...................... Zero or Non-Zero
Mantissa................ 1.f
Denormalized Numbers:
Represents real numbers in the form (-1)
E .................... -1022
min
Bias of e .............. +1023 ($3FF)
e ...................... 0 ($000)
f ...................... Non-Zero
Mantissa................ 0.f
Signed Zeros:
Represents real zeroes in the form (-1) s x 2 (E
Bias of e .............. +1023 ($3FF)
e ...................... 0 ($000)
f ...................... Zero
Mantissa................ 0.f = 0.00...00
Signed Infinities:
Represents infinities in the form (-1) s x 2 (E
Bias of e .............. n.a.
e ...................... 2047 ($7FF)
f ...................... Zero
Mantissa................ 1.f = 1.00...00
NaNs (Not-a-Number):
Represents NaNs as 2
s ...................... Don't care
Bias of e .............. n.a.
e ...................... 2047 ($7FF)
f ...................... Non-Zero: 11...11 Internal (legal) QNaN
5.3

DATA ORGANIZATION IN REGISTERS

5.3.1 Data ALU Registers

The thirty Data ALU registers are 32 bits wide and may be accessed as word operands. Sets of 2 Data
ALU registers may be concatenated to form ten 64 bits registers which may be accessed as long words.
The least significant bit (LSB) is the right-most bit (bit 0) and the most significant bit (MSB) is bit 31 or 63 for
integer operands.
MOTOROLA
s (E
x 2
min
max
(E +1+1023) x 1.f
max
1x...xx Recognized QNaN
0x...xx SNaN
DSP96002 USER'S MANUAL
-1+1023)
min
x 0.f
-1+1023) x 0.0
+1+1023) x 1.0
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