Motorola DSP96002 User Manual page 474

32-bit digital signal processor
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ORC
Logical Inclusive OR with Complement
Operation:
D.L v ~S.L
D.L
(parallel data bus move)
Description:
Logically inclusive OR the low portion of D with the logical complement of the low portion of S, and store
the result in the low portion of D. This instruction is useful for manipulating bit maps in graphic operations.
Input Operand(s) Precision: 32-bit integer.
Output Operand Precision: 32-bit integer.
CCR Condition Codes:
C
V
Z
N
I
LR
R
A
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: ORC
31
DATA BUS MOVE FIELD
Instruction Fields:
D
Dn.L
S
Dn.L
Timing: 2 + mv oscillator clock cycles
Memory: 1 + mv program words
A - 286
- Not affected.
- Always cleared.
- Set if result is zero. Cleared otherwise.
- Set if result is negative. Cleared otherwise.
- Not affected.
- Not affected.
- Not affected.
- Not affected.
S,D ( See the MOVE instruction description.)
OPTIONAL EFFECTIVE ADDRESS EXTENSION
d d d
n n n
where nnn = 0-7
s s s
n n n
where nnn = 0-7
DSP96002 USER'S MANUAL
Assembler Syntax:
ORC
S,D
( See the MOVE instruction description.)
14 13
11
0sss
ORC
0
1001
1ddd
MOTOROLA

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