Motorola DSP96002 User Manual page 890

32-bit digital signal processor
Table of Contents

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—A—
A Law . . . . . . . . . . . . . . . . . . . . . . . . 8-17
A/D Comb Filter Transfer Function . . 6-12
A/D Converter . . . . . . . . . . . . . . . . . . . 6-3
A/D Decimation DSP Filter . 6-32
48
. . . . . . . . . . . . . . . . . . . . . 6-56
,
A/D Section . . . . . . . . . . . . . . . . . . . . . 6-5
A/D Section DC Gain . . . . . . . . . . . . 6-12
A/D Section Frequency Response and DC
Gain . . . . . . . . . . . . . . . . . . . . 6-12
Address Registers . . . . . . . . . . . . . . . . 1-9
Analog Low-pass Filter Transfer Function
6-24
Attenuator . . . . . . . . . . . . . . . . . . . . . . 6-4
—B—
Bias Current Generator . . . . . . . . . . . . 6-3
Bit Field Manipulation Instructions . . . .34
Bootstrap Control Logic . . . . . . . . 3-7
Bootstrap Example, Host . . . . . . . . . . .21
Bootstrap Example, Low Cost . . . . . . . .21
Bootstrap Firmware Program . . . . . . . .14
Bootstrap from the External P Memory .15
Bootstrap from the Parallel Host Interface
17
Bootstrap from the SSI0 . . . . . . . . . . . .16
Bootstrap Memory . . . . . . . . . . . . . . . . 3-4
Bootstrap Mode . . . . . . . . . . . . . . . . . . 3-6
Bootstrap Program . . . . . . . . . . . . . . . 3-7
Bootstrap Program Listing . . . . . . . . . .15
Bootstrap ROM . . . . . . . . . . . . . . . 3-6
MOTOROLA
INDEX
Bus Control Register . . . . . . . . . . 4-3
Bus Control Register (BCR) . . . . . . . . . 42
6-40
6-
,
,
CCITT . . . . . . . . . . . . . . . . . . . . . . . . 8-17
CCR . . . . . . . . . . . . . . . . . . . . . . . . . 1-21
Clock Synthesis Control Register (PLCR)
9-7
COCR Audio Level Control Bits (VC3-VC0)
. . . . . . . . . . . . . . . . . . . . . . . . . 6-7
COCR Codec Enable Bit (COE) . . . . . 6-9
COCR Codec Interrupt Enable Bit (COIE)
6-9
COCR Codec Ratio Select Bits (CRS1-0)
6-8
COCR Input Select Bit (INS) . . . . . . . 6-9
COCR Microphone Gain Select Bits
(MGS1-0) . . . . . . . . . . . . . . . . . 6-8
COCR Mute Bit (MUT) . . . . . . . . . . . . 6-8
13
,
Codec . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
Codec Control Register (COCR) .6-6
49
Codec DC Constant for 105 Decimation/in-
terpolation Ratio . . . . . . . . . . 6-47
Codec DC Constant for 125 Decimation/in-
terpolation Ratio . . . . . . 6-31
Codec DC Constant for 81 Decimation/in-
terpolation Ratio . . . . . . . . . . 6-55
Codec Master Clock . . . . . . . . . . . . . . 6-3
Codec Receive Data Register . . . . . . 6-6
13
,
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—C—
6-7
,
6-39
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INDEX - 3
4-4
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