Motorola DSP96002 User Manual page 208

32-bit digital signal processor
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ADD
Operation:
D.L + S.L
D.L
Description:
Add the low portion of the two specified operands and store the result in the low portion of the destination
operand D.
Input Operand(s) Precision: 32-bit integer.
Output Operand Precision: 32-bit integer.
CCR Condition Codes:
C
- Set if carry is generated from MSB of the result. Cleared otherwise.
V
- Set if result overflows. Cleared otherwise.
Z
- Set if result is zero. Cleared otherwise.
N
- Set if result is negative. Cleared otherwise.
I
- Not affected.
LR
- Not affected.
R
- Not affected.
A
- Not affected.
ER Status Bits:
IER Flags:
Instruction Format: ADD
31
DATA BUS MOVE FIELD
OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA
Instruction Fields:
D
Dn.L
S
Dn.L
Timing: 2 + mv oscillator clock cycles
Memory: 1 + mv program words
A - 20
(parallel data bus move)
Not affected.
Not affected.
S,D
(move syntax - see the MOVE instruction description.)
(u u)
d d d
n n n
where nnn = 0-7
s s s
n n n
where nnn = 0-7
DSP96002 USER'S MANUAL
Add
Assembler Syntax:
ADD
S,D
14 13
00
(move syntax - see the MOVE in-
struction description.)
1sss
uu11
1ddd
MOTOROLA
ADD
0

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