Motorola DSP96002 User Manual page 528

32-bit digital signal processor
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B.1.12 Nth Order Power Series (Real)
c = SUM (I=0,...,N) { a(I) * b
move
move
move
fclr
do
fmpy
fmpy.s d6,d4,d2
end
fadd.s d2,d0
B.1.13 2nd Order Real Biquad IIR Filter
w(n) = x(n) - a1 * w(n-1) - a2 * w(n-2)
y(n) = w(n) + b1 * w(n-1) + b2 * w(n-2)
Input sample in d0.
X Memory Order - w(n-2), w(n-1)
Y Memory Order - a2, a1, b2, b1
move
fmpy.s d6,d4,d2
fmpy
fmpy
fmpy
move
MOTOROLA
I
}
#baddr,r4
#aaddr,r0
d2
#N,end
d6,d7,d1 fadd.s d2,d0
d6,d5,d2 fsub.s d2,d0.s d5.s,x:(r0)+
d6,d4,d2 fsub.s d2,d0
d6,d5,d2 fadd.s d2,d0
fadd.s d2,d0
DSP96002 USER'S MANUAL
N
N-1
c = a
b
+ a
b
+ ... + a
N
N-1
y:(r4),d7.s
x:(r0)+,d0.s y:(r4),d6.s
x:(r0)+,d4.s
d1.s,d6.s
x:(r0)+,d4.s
x:(r0)-,d5.s
d0.s,x:(r0)
d0.s,x:output
1
b
+ a
1
0
Program
ICycles
Words
1
1
1
1
2
1
1
1
---
---
Totals:
9
2N+8
(9
2N+8)
Program
Words
y:(r4)+,d6.s
1
y:(r4)+,d6.s
1
y:(r4)+,d6.s
1
y:(r4),d6.s
1
1
1
1
---
Totals:
7
(7
1
1
1
1
3
1
1
1
ICycles
1
1
1
1
1
1
1
---
7
7)
B-9

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