Motorola DSP96002 User Manual page 472

32-bit digital signal processor
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NOT
Operation:
~D{31:0}
D{31:0} (parallel data bus move)
Description:
The one's complement of the low portion of the destination operand is taken and the result is stored in D.
This instruction is a 32-bit operation and is performed on bits 0-31 of D. The remaining bits of D are not
affected.
Input Operand(s) Precision: 32-bit integer.
Output Operand Precision: 32-bit integer.
CCR Condition Codes:
C
V
Z
N
I
LR
R
A
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: NOT
31
DATA BUS MOVE FIELD
OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA
Instruction Fields:
D
Dn.L
Timing: 2 + mv oscillator clock cycles
Memory: 1 + mv program words
A - 284
Logical Complement
- Not affected.
- Always cleared.
- Set if result is zero. Cleared otherwise.
- Set if result is negative. Cleared otherwise.
- Not affected.
- Not affected.
- Not affected.
- Not affected.
D
( See the MOVE instruction description.)
(u u)
d d d
n n n
where nnn = 0-7
DSP96002 USER'S MANUAL
Assembler Syntax:
NOT
D
( See the MOVE instruction description.)
14 13
10
0010
NOT
0
uu01
1ddd
MOTOROLA

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