Motorola DSP96002 User Manual page 490

32-bit digital signal processor
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SPLIT
Operation:
S.L {31:16}
D.L {15:0}
S.L {31}
D.L {31:16}
Description:
Transfer the 16 MSBs of the lower portion of source operand S into the 16 LSBs of the lower portion of
destination D and sign-extend to 32 bits.
Input Operand(s) Precision: 32-bit integer.
Output Operand Precision: 32-bit integer.
CCR Condition Codes:
C
- Not affected.
V
- Always cleared.
Z
- Set if result is zero. Cleared otherwise.
N
- Set if result is negative. Cleared otherwise.
I
- Not affected.
LR
- Not affected.
R
- Not affected.
A
- Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: SPLIT
31
DATA BUS MOVE FIELD
OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA
Instruction Fields:
D
Dn.L
S
Dn.L
Timing: 2 + mv oscillator clock cycles
Memory: 1 + mv program words
A - 302
Extract a 16-bit Integer
(parallel data bus move)
S,D
(move syntax - see the Move instruction description.)
d d d
n n n
where nnn = 0-7
s s s
n n n
where nnn = 0-7
DSP96002 USER'S MANUAL
Assembler Syntax:
SPLIT
S,D
(move syntax - see the Move instruction de-
scription.)
14 13
11
0sss
SPLIT
0
1011
0ddd
MOTOROLA

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