Motorola DSP96002 User Manual page 647

32-bit digital signal processor
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dc .5,.5,.5,.5
dc .5,.5,.5,.5
dc .5,.5,.5,.5
org p:$100
move #amatrix,r0
move #N,n0
move #N_sqr-1,m0
move #bmatrix,r4
move #cmatrix,r1
move n0,n4
move m0,m4
move n0,n1
move m0,m1
fclr d1
fclr d3
do
#N,endall
do
#N,endcol
rep
#N
fmpy d0,d4,d3 fadd.s d3,d1 x:(r0)+,d0.s y:(r4)+n4,d4.s 1
fclr d1 d1.s,x:(r1)+n1
endcol
move (r4)+
move (r1)+
endall
B.1.55
[4x4] by [4x4] Matrix Multiplication (Modulo-Aligned)
;This routine performs a [4x4] by [4x4] matrix multiplication
;for the 96000 floating-point DSP chip.
;The data for all matrices is stored in row major
;format.
For example, take the matrix A:
;
;
;
;
;
;
;Matrix A's elements are stored as such:
B-128
; modulo N-squared addressing
x:(r0)+,d0.s y:(r4)+n4,d4.s
d1.s,d7.s
fadd.s d3,d1 d7.s,d3.s
; increment r4
; increment r1
A(1,1) ... A(1,N)
.
.
.
.
A(N,1) ... A(N,N)
DSP96002 USER'S MANUAL
Sample data is given.
.
.
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
---
---
Totals:
21
n**3
+4n**2
+5n
+16
MOTOROLA
1
1
1
1
1
1
1
1
1
1
1
3
3
2
1
1
1
1
1

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