Motorola DSP96002 User Manual page 746

32-bit digital signal processor
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ROUND
EXPONENT RANGE
TO
BEFORE ROUND
(UNBIASED)
SP
NaN operand or
invalid op
SP
127<E
SP
127<E< 128
SP
-150
E
SP
E
SEP
NaN operand or
invalid op
SEP
1023<E
SEP
127<E< 1024
SEP
-127<E< 128
SEP
-150< e < -126
SEP
-1023< e < -149 zero in SP
SEP
-1054< e< -1022 zero in SP
SEP
e< -1053 zero in SP
Figure C-16. Data ALU Results/Move Compatibility Summary
MOTOROLA
DATA ALU OPERATION
RESULT
non signaling NaN (QNAN)
written as DP
e=7FF
mantissa=1.11...11
infinity
(overflow)
written as DP
e=7FF
mantissa=1.00...00
normalized (all formats)
126
denormalized ( in SP)
149
zero (underflow)
non signaling NaN (QNAN)
written as DP
e=7FF
mantissa=1.11...11
infinity in SP and SEP
written as DP
e=7FF
mantissa=1.00...00
infinity in SP
normalized in SEP
normalized (all formats)
denormalized
normalized in SEP
normalized in SEP
denormalized in SEP
zero in SEP (underflow)
DSP96002 USER'S MANUAL
TAGS
U
V
0
0
QNAN
0
0
infinity
0
0
1
0
0
0
0
0
QNAN
0
0
infinity
0
0
0
0
in SP
0
0
0
0
0
1
0
0
MOVE
MOVE OUT
OUT
RESULT
TYPE
SP
CORRECT
DP
CORRECT
SP
CORRECT
DP
CORRECT
SP
CORRECT
DP
CORRECT
SP
CORRECT
DP
WRONG
SP
CORRECT
DP
CORRECT
SP
CORRECT
DP
CORRECT
SP
CORRECT
DP
CORRECT
SP
WRONG
DP
CORRECT
SP
TRUNC
DP
CORRECT
SP
WRONG
DP
CORRECT
SP
WRONG
DP
CORRECT
SP
WRONG
DP
CORRECT
SP
CORRECT
DP
CORRECT
C-23

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