Motorola DSP96002 User Manual page 701

32-bit digital signal processor
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;
extended precision number.
;
; Entry point:
;
; Input:
r0 contains the lowest address of the 4-word internal
;
;
d0 contains the DSP96002 floating-point number.
;
;
;
;
;
;
; The SP denormalized is encoded using the U tag.
; appear the same with varying amount of significand bits.
;
; Output:
r0 points to the lowest address of a double precision
;
;
; Error checking:
;
NaNs
;
+/- inf
;
; Alters:
D0.L,D1.L,D2.L,D0.H,D1.H
;
ieee2dplib
ftst
fjor
rts
_notnan
fjeq
clr
bclr
inc
ftst
fjinf
jset
move
move
move
move
add
move
rts
_dodenorm
move
bfind
clr
lsl
move
move
sub
move
rts
B-182
ieee2dplib:
c(r0)
extended precision number
The DSP96002 has the following floating-point formats:
SP normalized (24 bit mantissa)
SP denormalized
SEP normalized (32 bit mantissa)
SEP denormalized (encoded as DP normalized)
DP normalized
number in non-IEEE double precision format.
- Not converted, internal A register not affected
- Limited to maximum internal format value
d0
_notnan
uflow
d1
#31,d0.h
d1
ifcs
d0
d1.l,x:(r0+sign)
oflow
#30,d0.h,_dodenorm
d0.m,x:(r0+ms)
d0.l,x:(r0+ls)
d0.h,d0.l
#$1ffffc00,d1.l
d1,d0
d0.l,x:(r0)
d0.m,d0.l
d0,d1
d2
d1.h,d1.l
d1.h,d0
d2.l,x:(r0+ls)
d0.l,x:(r0+ms)
#$1fffff81,d0.l
d1,d0
d0.l,x:(r0)
DSP96002 USER'S MANUAL
convert(d0)
All other encodings
;check input
;ok if not nan
;no conversion
;if zero, set zero
;get zero for sign
;get sign and clear sign bit
;if sign bit is set, inc
;reset flags, save sign
;limit if infinity
;do denorm if U tag is set
;save ms of significand
;save ls of significand
;get dp exponent
;get bias adjustment
;new bias
;set exponent
;get denormed sp significand
;find first 1
;get a 0, move shift
;norm ms, set 0 ls
;set ms
;get exponent
;sub denorm shift to get new bias
;set exponent
MOTOROLA

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