Motorola DSP96002 User Manual page 480

32-bit digital signal processor
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RESET
SET
Operation:
Reset all on-chip peripherals and
Description:
All on-chip peripherals and the Interrupt Priority Register are reset. See Chapter 7 for a description of the
effect of the RESET instruction on the peripherals. The processor state is not affected and execution con-
tinues with the next instruction, but all maskable interrupt sources are disabled. The only interrupts that
can then occur are Stack Error, Hardware Reset, ILLEGAL, TRAPcc and FTRAPcc.
CCR Condition Codes: Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: RESET
31
0000
0000
Instruction Fields:
None
Timing: 4 oscillator clock cycles
Memory: 1 program words
A - 292
Reset Peripheral Devices
0000
0000
DSP96002 USER'S MANUAL
the Interrupt Priority Register.
Assembler Syntax:
RESET
14 13
00
00
0000
RE-
0
0000
0100
MOTOROLA

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