Motorola DSP96002 User Manual page 178

Figure 10-6. Breakpoint and Trace Counter Logic
for any newly fetched instruction including instructions fetched by the interrupt processing or instructions
that will be killed by the interrupt processing.
10.7.3 External Request During STOP
— –
Asserting D R when the chip is in the STOP state (i. e., has executed a STOP instruction) causes the
chip to exit the STOP state and enter the Debug Mode. After receiving the acknowledge, the command con-
— –
troller must negate D R . Note that in this case, the chip completes the execution of the STOP instruction
and halts after the next instruction enters the instruction latch.
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