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5.7.4.1 Immediate Data
This addressing mode requires one word of instruction extension. The immediate data is a word operand
in the extension word of the instruction. This reference is classified as a program reference.
5.7.4.2
Immediate Short Data
The 8-, 16-, or 19-bit operand is in the instruction operation word. The 8-bit operand is used for ANDI and
ORI instructions and it is zero extended. The 16-bit operand is used for immediate move to register and it
is sign extended (interpreted as signed integer). The 19-bit operand is used for DO and REP instructions
and it is zero extended. This reference is classified as a program reference.
5.7.4.3 Absolute Address
This addressing mode requires one word of instruction extension. The address of the operand is in the ex-
tension word. This reference is classified as a memory reference and a program reference.
5.7.4.4 Absolute Short Address
For the Absolute Short addressing mode the address of the operand occupies 7 bits in the instruction op-
eration word and it is zero extended. This reference is classified as a memory reference.
5.7.4.5 Short Jump Address
The operand occupies 15 bits in the instruction operation word. The address is sign extended to 32 bits to
use the same format for jumps and relative branches. This reference is classified as a program reference.
5.7.4.6
I/O Short Address
For the I/O short addressing mode the address of the operand occupies 7 bits in the instruction operation
word and it is one extended. I/O short is used with the bit manipulation and move peripheral data instruc-
tions.
5.7.4.7 Implicit Reference
Some instructions make implicit reference to the program counter (PC), system stack (SSH, SSL), loop ad-
dress register (LA), loop counter (LC)or status register (SR). The registers implied and their use is defined
by the individual instruction descriptions (Appendix A).
5.7.5 Addressing Modes Summary
Figure 5-7 contains a summary of the addressing modes discussed in the previous paragraphs.
5.8
ADDRESS MODIFIER TYPES
The DSP96002 Address Generation Unit supports linear, modulo and bit-reversed address arithmetic for
all address register indirect modes. Address modifiers determine the type of arithmetic used to update ad-
dresses. Address modifiers allow the creation of data structures in memory for FIFOs (queues), delay lines,
circular buffers, stacks and bit-reversed FFT buffers. Data is manipulated by updating address registers
MOTOROLA
DSP96002 USER'S MANUAL
5 - 17
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