Motorola DSP96002 User Manual page 282

FADDSUB.S
Operation:
D1 + D2 ROUND(SP)
D1 - D2 ROUND(SP)
Description:
Add and subtract the two specified operands and round to single precision. Store the rounded result of
the addition in D2 and of the subtraction in D1.
Input Operand(s) Precision: SEP Floating-Point.
Output Operand(s) Precision: SP Floating-Point.
CCR Condition Codes:
C
V
Z
N
I
LR
–
R
A
ER Status Bits:
INX
DZ
UNF
OVF
OPERR -Set if operands of the addition are opposite-signed infinities or if the operands of
SNAN -Set if any operand is a signaling NaN. Cleared otherwise.
NAN
UNCC -Always cleared.
IER Flags: Flags changed according to standard definition.
A - 94
Add and Subtract
D2 (parallel data bus move)
D1
- Not affected.
- Not affected.
- Set if result of the addition is zero. Cleared otherwise.
- Set if result of the addition is negative. Cleared otherwise.
- Set if result of the addition is infinity. Cleared otherwise.
- Not affected.
- Not affected.
- Not affected.
-Set if the addition or subtraction result is inexact. Cleared otherwise.
-Always cleared.
-Set if the addition or subtraction result underflows. Cleared otherwise.
-Set if the addition or subtraction result overflows. Cleared otherwise.
the subtraction are like-signed infinities. Cleared otherwise.
-Set if result of the addition is a NaN. Cleared otherwise.
DSP96002 USER'S MANUAL
FADDSUB.S
Assembler Syntax:
FADDSUB.S D1,D2
(move syntax - see the MOVE instruc-
tion description.)
MOTOROLA