Motorola DSP96002 User Manual page 705

32-bit digital signal processor
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inc
jmp
;
; Calculate the result assuming that c(r0) > 0 and X < 0
;
apos
cmp
jne
cmp
jeq
decide
jcc
jmp
r1fromr0 sub
subc
jmp
;
; Shift the c(r0) 64 bit significand
;
dshifta
move
lsr
lsr
sub
move
lsl
or
jmp
;
; Shift the c(r1) 64 bit significand
;
dshiftx
move
lsr
lsr
sub
move
lsl
or
jmp
;
; Replace c(r0) with c(r1)
;
aequalx
move
move
move
move
move
;
; Leave c(r0) unchanged
;
aequala
rts
;
; Place the result of the operation in c(r0)
;
leave
move
move
move
B-186
d4.l
leave
d2,d0
decide
d3,d1
#1,d7.l
dp_clr
r1fromr0
r0fromr1
d3,d1
d2,d0
subnorm
d5.l,d0.h
d0.h,d1
d0.l,d6.l ;shift ls, copy ms
d0.h,d0
#32,d7.l
d5,d7
d7.l,d0.h
d0.h,d6
d6,d1
addmant
d6.l,d0.h
d0.h,d3
d2.l,d1.h ;shift ls, copy ms
d0.h,d2
#32,d7.l
d6,d7
d1.h,d6.l ;calc. # opposite dir. shifts
d7.l,d0.h
d0.h,d6
d6,d3
addmant
(c(r0) is insignificant compared to c(r1))
x:(r1+sign),d0.l
d0.l,x:(r0+sign)
d3.l,x:(r0+ls)
d2.l,x:(r0+ms)
d4.l,x:(r0)
(c(r1) is insignificant compared to c(r0))
d0.l,x:(r0+ms)
d1.l,x:(r0+ls)
d4.l,x:(r0)
DSP96002 USER'S MANUAL
;increment the exponent
;check for overflow
;compare mantissas
;if ms's are equal, test ls's
;compare ls of mantissas
;clear reg_a if same magnitude
;if c(r0) > c(r1), c(r0) - c(r1)
;subtract c(r0) from c(r1)
;subtract c(r1) from c(r0)
;calculate c(r0)_ms
;normalize result
;# of shifts in .h register
;shift ms
;calc. # opposite dir. shifts
;# of shifts in .h register
;get bits to be shifted to ls
;shift in bits from ms to ls
;# of shifts in .h register
;shift ms
;# of opposite dir. shifts
;get bits to be shifted to ls
;shift in bits from ms to ls
;c(r0)_sign
c(r1)_sign
;c(r0)_ls
c(r1)_ls
;c(r0)_ms
c(r1)_ms
;c(r0)_exp
c(r1)_exp
;store c(r0)_ms
;store c(r0)_ls
;store c(r0) exponent
MOTOROLA

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