Motorola DSP96002 User Manual page 570

32-bit digital signal processor
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move
#32,d1.l
d2,d1
d1.l,d0.h ;move other shift
;shift, copy input
other part
together
Totals:
B.1.28 Bit Field Extraction/Insertion
The process of bit field extraction is performed on a 32 bit integer in the lower part of a register. A bit field
of length FSIZE starting at bit position FOFF is extracted and right justified with zero or sign extension. The
value of FSIZE ranges from 1-32 and the field offset ranges from 0-31. Bit field extraction and insertion
operations are used in high level languages such as "structures" in C. Both the static case (extraction
based on fixed constants) and the dynamic case (extraction based on the values in registers) are given. In
the examples, the field to be extracted is in d0.l.
The process of bit field insertion is performed on two 32 bit integer registers. A bit field of length FSIZE
from one register is shifted left by an offset FOFF and the field is then inserted into the second register.
The field size FSIZE ranges from 1-32 and the field offset from the right of the register ranges from 0-31.
For meaningful results, FSIZE+FOFF is less than or equal to 32. The bit field to insert is right justified in
the register with zero extension to 32 bits. Both the static case (extraction based on fixed constants) and
the dynamic case (extraction based on the values in registers) are given. In the examples, the field in d1.l
is inserted into d0.l.
1. Static bit field extraction, zero extend.
lsl
#32-(foff+fsize),d0
#32-fsize,d0
Totals:
2. Static bit field extraction, sign extend.
lsl
#32-(foff+fsize),d0
asr
#32-fsize,d0
Totals:
MOTOROLA
d2.l,d1.h ;32-shift, move shift
1
1
1
1
1
6
6
;right justify
2
2
2
2
DSP96002 USER'S MANUAL
;get 32
1
1
1
lsl
1
lsr
d1,d1
or
d1,d0
---
---
;shift off upper bits
---
---
;shift off upper bits
;right justify, sign ext 1
---
---
Program
ICycles
Words
1
1
sub
1
move
d0,d0
d0.l,d1.l
;merge bits
Program
ICycles
Words
1
1
1
1
Program
ICycles
Words
1
1
1
;shift
lsr
B-51

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