Motorola DSP96002 User Manual page 35

32-bit digital signal processor
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ister during address register update calculations but they can hold data. Each modifier register may be read
or written by the Global Data Bus. Each modifier register is automatically read when the same number ad-
dress register is read and used as input to its associated modulo arithmetic unit. The registers accessed
by the Global Data Bus and the Modulo Arithmetic Unit are not required to be the same. A separate write
enable is provided for each register. Each modifier register is set to $FFFFFFFF during a processor reset.
Due to pipelining, if a modifier register M is the destination of a MOVE instruction,
the new contents will not be available for use in address calculations until the second
following instruction.
3.4.4 Temporary Address Registers
There are two kinds of temporary registers in the AGU: TempR (high and low) and TempN (high and low).
The temporary address registers, TempR Low and TempR High, are 32-bit registers which provide tempo-
rary storage for an absolute address loaded from the Program Data Bus or for the output of the respective
modulo arithmetic units. The modulo arithmetic unit output is loaded into the TempR registers during the
pre-update cycle of the indexed by offset addressing mode and the LEA instruction. In each of these cases,
an address register is accessed, updated by its respective modulo arithmetic unit, and stored in TempR in
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Figure 3-3. AGU Block Diagram
CAUTION
DSP96002 USER'S MANUAL
MOTOROLA

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