Motorola DSP96002 User Manual page 492

32-bit digital signal processor
Table of Contents

Advertisement

STOP
Operation:
Enter the STOP processing state and
stop the clock oscillator.
Description:
When a STOP instruction is executed, the processor enters the STOP processing state. The clock oscil-
lator is gated off. All activity in the processor is suspended until the
is asserted. The STOP processing state is the lowest-power stand-by state.
During the STOP state, port A is in an idle state with the control signals held inactive (i.e.,
= V
etc., the data pins (D0–D23) are high impedance, and the address pins (A1–A15) are unchanged from
cc
the previous instruction. If the bus grant was asserted when the STOP instruction was executed, port A will
remain three-stated until the DSP exits the STOP state.
If the exit from the STOP state was caused by a low level on the
will enter the reset processing state. Consult the DSP96002 Technical Data Sheet (DSP96002/D) for timing
details.
If the exit from the STOP state was caused by a low level on the
service the highest priority pending interrupt and will not service the
est priority. The interrupt will be serviced after an internal delay (see the DSP96002 Technical Data Sheet
(DSP96002/D) for details). The processor will resume program execution at the instruction following the
STOP instruction that caused the entry into the STOP state after the interrupt has been serviced or if no
interrupt was pending immediately after the delay. If the
struction is executed, the clock will not be gated off, and the internal delay counter will be started.
CCR Condition Codes: Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: STOP
31
0000
0000
Instruction Fields:
None
Timing: n/a
Memory: 1 program words
A - 304
Stop Instruction Processing
0000
0000
DSP96002 USER'S MANUAL
Assembler Syntax:
STOP
R
E
R
E
S
I
R
Q
A pin, then the processor will
I
R
Q
I
R
Q
A pin is asserted when the STOP in-
14 13
00
00
0000
STOP
S
E
T or
I
R
Q
A pin
R
D =
W
E
T pin, then the processor
A interrupt unless it is high-
0000
1111
MOTOROLA
R
0

Advertisement

Table of Contents
loading

Table of Contents