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4.
ACK
5.
Send command WRITE PDB REGISTER (GO, EX).
(ODEC selects PDB as destination for serial data.)
6.
ACK
7.
Send 32 bits of the target absolute address ($xxxxxxxx). The chip will resume fetching from
the target address (you do not have to worry about the pipeline). Note that the trace counter
will count this instruction so the current trace counter may need to be corrected if the trace
mode enable bit in the OSCR has been set.
(e. g., After 32 bits have been received, the PDB register drives the PDB. ODEC releases the
chip from the "halt" state and the Debug Mode bit in OSCR is cleared. The chip executes first
the jump instruction and will then fetch the instruction from the target address. The chip con-
tinues to execute instructions from that address until a Debug Mode condition occurs.)
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DSP96002 USER'S MANUAL
MOTOROLA
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