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BSR
Operation:
Assembler
Syntax:
Attributes:
Description:
ing the BSR instruction onto the system stack. The PC contains the address of the
instruction word plus two. Program execution then continues at location (PC) + dis-
placement. The displacement is a twos complement integer that represents the rela-
tive distance in bytes from the current PC to the destination PC. If the 8-bit
displacement field in the instruction word is zero, a 16-bit displacement (the word
immediately following the instruction) is used. If the 8-bit displacement field in the
instruction word is all ones ($FF), the 32-bit displacement (long word immediately fol-
lowing the instruction) is used.
Condition Codes:
Not affected.
Instruction Format:
15
14
13
0
1
1
Instruction Fields:
8-Bit Displacement field — Twos complement integer specifying the number of bytes
between the branch instruction and the next instruction to be executed.
16-Bit Displacement field — Used for larger displacement when 8-bit displacement is
$00.
32-Bit Displacement field — Used for larger displacement when 8-bit displacement is
$FF.
A branch to the instruction immediately following automatically uses
16-bit displacement because the 8-bit displacement field contains
$00 (zero offset).
MOTOROLA
4-46
Branch to Subroutine
SP – 4 → SP; PC → (SP); PC + d → PC
BSR 〈label〉
Size = (Byte, Word, Long)
Pushes the long word address of the instruction immediately follow-
12
11
10
9
0
0
0
0
16-BIT DISPLACEMENT IF 8-BIT DISPLACEMENT = $00
32-BIT DISPLACEMENT IF 8-BIT DISPLACEMENT = $FF
INSTRUCTION SET
8
7
6
5
1
8-BIT DISPLACEMENT
NOTE
BSR
4
3
2
1
CPU32
REFERENCE MANUAL
0
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