Motorola CPU32 Reference Manual page 143

Hide thumbs Also See for CPU32:
Table of Contents

Advertisement

MOVE
from SR
Operation:
Assembler
Syntax:
Attributes:
Description:
destination must be of word length. Unimplemented bits are read as zeros.
Condition Codes:
Not affected.
Instruction Format:
15
14
13
0
1
0
Instruction Fields:
Effective Address field — Specifies the destination location. Only data alterable
addressing modes are allowed as shown:
Addressing Mode
Dn
An
(An)
(An) +
– (An)
(d
, An)
16
(d
, An, Xn)
8
(bd, An, Xn)
Use the MOVE from CCR instruction to access only the condition
codes.
CPU32
REFERENCE MANUAL
Move from the Status Register
(Privileged Instruction)
If supervisor state
then SR → Destination
else TRAP
MOVE SR, 〈ea〉
Size = (Word)
Moves the data in the status register to the destination location. The
12
11
10
9
0
0
0
0
Mode
Register
000
Reg. number: Dn
010
Reg. number: An
011
Reg. number: An
100
Reg. number: An
101
Reg. number: An
110
Reg. number: An
110
Reg. number: An
INSTRUCTION SET
8
7
6
5
0
1
1
Addressing Mode
(xxx).W
(xxx).L
#〈data〉
(d
, PC)
16
(d
, PC, Xn)
8
(bd, PC, Xn)
NOTE
MOVE
from SR
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
Mode
Register
111
000
111
001
MOTOROLA
0
4-95

Advertisement

Table of Contents
loading

Table of Contents