Notation Conventions; Implicit Reference - Motorola CPU32 Reference Manual

3.2 Notation Conventions

EA — Effective address
An — Address register n
Example: A3 is address register 3
Dn — Data register n
Example: D5 is data register 5
Rn — Any register, data or address
Xn.SIZE*SCALE —
Index register n (data or address),
Index size (W for word, L for long word),
Scale factor (1, 2, 4, or 8 for byte, word, long-word or quad-word scaling)
PC — Program counter
SR — Status register
SP — Stack pointer
CCR — Condition code register
USP — User stack pointer
SSP — Supervisor stack pointer
dn — Displacement value, n bits wide
bd — Base displacement
L — Long-word size
W — Word size
B — Byte size
(An) — Identifies an indirect address in a register

3.3 Implicit Reference

Some instructions make implicit reference to the program counter, the system stack
pointer, the user stack pointer, the supervisor stack pointer, or the status register. The
following table shows the instructions and the registers involved:
ANDI to CCR
ANDI to SR
BRA
BSR
CHK (exception)
CHK2 (exception)
DBcc
DIVS (exception)
DIVU (exception)
EORI to CCR
EORI to SR
JMP
JSR
LINK
LPSTOP
MOVE CCR
MOVE SR
MOVE USP
MOTOROLA DATA ORGANIZATION AND ADDRESSING CAPABILITIES
3-2
Instruction
SR
SR
PC
PC, SP
PC, SP
SSP, SR
PC
SSP, SR
SSP, SR
SR
SR
PC
PC, SP
SP
SR
SR
SR
USP
Implicit Registers
REFERENCE MANUAL
CPU32