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SUBA
15
14
13
1
0
0
Opmode Field:
SUBX
15
14
13
1
1
0
Size Field: 00 = Byte 01 = Word 10 = Long
R/M Field: 0 = Data Register to Data Register 1 = Memory to Memory
If R/M = 0, both registers must be data registers
If R/M = 1, both registers must be address registers for Predecrement Addressing mode
CMP
15
14
13
1
0
1
CMPA
15
14
13
1
0
1
Opmode Field:
EOR
15
14
13
1
0
1
Opmode Field:
CPU32
REFERENCE MANUAL
12
11
10
9
1
REGISTER
Word
Long
011
111
12
11
10
9
1
REGISTER Rx
12
11
10
9
1
REGISTER
Byte
Word
000
001
12
11
10
9
1
REGISTER
Word
Long
011
111
12
11
10
9
1
REGISTER
Byte
Word
100
101
INSTRUCTION SET
8
7
6
5
OPMODE
Operation
〉
〉
→
〉
〈Dn
(〈An
) – (〈ea
)
8
7
6
5
1
SIZE
0
8
7
6
5
OPMODE
Opmode Field:
Long
Operation
〉
010
(〈Dn
) – (〈ea
8
7
6
5
OPMODE
Operation
〉
〉
→
) – (〈ea
(〈An
)
CCR
8
7
6
5
OPMODE
Long
Operation
〉
(〈ea
) ⊕ (〈Dn
110
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
4
3
2
1
0
R/M
REGISTER Ry
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
〉
→
)
CCR
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
〉
→
〉
)
〈ea
MOTOROLA
0
0
0
0
0
4-183
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