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6-17
Interface Status Register (ISR) ................................................................................ 6-27
6-18
Interrupt Vector Register (IVR)............................................................................... 6-29
7-1
ESSI Block Diagram.................................................................................................. 7-1
7-2
ESSI Control Register A(CRA) ............................................................................... 7-14
7-3
ESSI Clock Generator Functional Block Diagram .................................................. 7-17
7-4
ESSI Frame Sync Generator Functional Block Diagram ........................................ 7-17
7-5
ESSI Control Register B (CRB) .............................................................................. 7-18
7-6
CRB FSL0 and FSL1 Bit Operation (FSR = 0) ....................................................... 7-24
7-7
CRB SYN Bit Operation.......................................................................................... 7-25
7-8
CRB MOD Bit Operation ........................................................................................ 7-26
7-9
Normal Mode, External Frame Sync (8 Bit, 1 Word in Frame) .............................. 7-27
7-10
Network Mode, External Frame Sync (8 Bit, 2 Words in Frame)........................... 7-27
7-11
ESSI Status Register (SSISR).................................................................................. 7-28
7-12
ESSI Data Path Programming Model (SHFD = 0) .................................................. 7-31
7-13
ESSI Data Path Programming Model (SHFD = 1) .................................................. 7-32
7-14
ESSI Transmit Slot Mask Register A (TSMA) ....................................................... 7-33
7-15
ESSI Transmit Slot Mask Register B (TSMB)........................................................ 7-34
7-16
ESSI Receive Slot Mask Register A (RSMA)......................................................... 7-35
7-17
ESSI Receive Slot Mask Register B (RSMB) ......................................................... 7-35
7-18
Port Control Registers (PCRC X:$FFFFBF) (PCRD X:$FFFAF) .......................... 7-36
7-19
Port Direction Registers (PRRC X:$FFFFBE) (PRRD X: $FFFFAE).................... 7-37
7-20
Port Data Registers (PDRC X:$FFFFBD) (PDRD X: $FFFFAD).......................... 7-38
8-1
SCI Data Word Formats (SSFTD = 1), 1................................................................. 8-10
8-2
SCI Data Word Formats (SSFTD = 0), 2................................................................. 8-11
8-3
SCI Control Register (SCR) .................................................................................... 8-12
8-4
SCI Clock Control Register (SCCR) ....................................................................... 8-19
8-5
SCI Baud Rate Generator ........................................................................................ 8-20
8-6
16 x Serial Clock...................................................................................................... 8-21
8-7
SCI Programming Model-Data Registers ............................................................. 8-22
8-8
Port E Control Register (PCRE X:$FFFF9F) .......................................................... 8-24
8-9
Port E Direction Register (PRRE X:$FFFF9E)....................................................... 8-25
8-10
Port Data Registers (PDRE X:$FFFF9D)................................................................ 8-25
9-1
Triple Timer Module Block Diagram ........................................................................ 9-2
9-2
Timer Module Block Diagram................................................................................... 9-3
9-3
Timer Mode (TRM = 1)............................................................................................. 9-7
9-4
Timer Mode (TRM = 0)............................................................................................. 9-7
9-5
Pulse Mode (TRM = 1).............................................................................................. 9-8
9-6
Pulse Mode (TRM = 0).............................................................................................. 9-9
9-7
Toggle Mode, TRM = 1 ........................................................................................... 9-10
9-8
Toggle Mode, TRM = 0 ........................................................................................... 9-11
9-9
Event Counter Mode, TRM = 1 ............................................................................... 9-12
9-10
Event Counter Mode, TRM = 0 ............................................................................... 9-13
9-11
Pulse Width Measurement Mode, TRM = 1............................................................ 9-15
9-12
Pulse Width Measurement Mode, TRM = 0............................................................ 9-15
9-13
Period Measurement Mode, TRM = 1 ..................................................................... 9-16
9-14
Period Measurement Mode, TRM = 0 ..................................................................... 9-17
Figures
xiii
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