Operating Modes - Motorola DSP56303 User Manual

24-bit digital signal processor
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2.
Configure the interrupt trigger:
a.
Enable and prioritize overall peripheral interrupt functionality.
b.
Enable a specific peripheral interrupt.
c.
Unmask interrupts at the global level.
d.
Configure a peripheral interrupt-generating function.
e.
Enable peripheral and associated signals.
9.3

Operating Modes

Each timer has operating modes that meet a variety of system requirements, as follows:
n
Timer
— GPIO, mode 0: Internal timer interrupt generated by the internal clock
— Pulse, mode 1: External timer pulse generated by the internal clock
— Toggle, mode 2: Output timing signal toggled by the internal clock
— Event counter, mode 3: Internal timer interrupt generated by an external clock
n
Measurement
— Input width, mode 4: Input pulse width measurement
— Input period, mode 5: Input signal period measurement
— Capture, mode 6: Capture external signal
n
PWM, mode 7: Pulse width modulation
n
Watchdog
— Pulse, mode 9: Output pulse, internal clock
— Toggle, mode 10: Output toggle, internal clock
Note:
To ensure proper operation, the TCSR TC[3–0] bits should be changed only when
the timer is disabled (that is, when TCSR[TE] is cleared).
Triple Timer Module
Operating Modes
IPRP (TOL[1–0])
TCSR0 (TCIE)
SR (I[1–0])
TCSR0 (TC[7–4])
TCSR0 (TE)
9-5

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