Hi08 Host Request Structure; Hreq Pin Operation In Single Request Mode (Icr[2]=Hdrq=0); Htrq And Hrrq Pin Operation In Double Request Mode (Icr[2]=Hdrq=1) - Motorola DSP56303 User Manual

Operation
requests, respectively. When host requests are enabled, the host request pins operate as shown
in Figure 6-3.
7
$2
HREQ 0
Host Request
Asserted
7
$0 INIT 0
Table 6-5 shows the operation of the
can test these ICR bits to determine the interrupt source.
Table 6-5. HREQ Pin Operation In Single Request Mode (ICR[2]=HDRQ=0)
ICR[1]=TREQ
0
0
1
1
Table 6-6 shows the operation of the transmit request (
lines with dual host requests enabled.
Table 6-6. HTRQ and HRRQ Pin Operation In Double Request Mode (ICR[2]=HDRQ=1)
ICR[1]=TREQ
0
0
1
1
6-10
0 HF3 HF2 TRDY
0 HF1 HF0 HLEND TREQ RREQ ICR
Figure 6-3. HI08 Host Request Structure
HREQ
ICR[0]=RREQ
0
1
0
1
ICR[0]=RREQ
0 No interrupts
1 No interrupts
0 TXDE Request enabled
1 TXDE Request enabled
DSP56303 User's Manual
Status
0
TXDE RXDF ISR
0
Enable
pin when a single request line is used. The host
No interrupts
RXDF request enabled
TXDE request enabled
RXDF and TXDE request enabled
) and receive request (
HTRQ
HTRQ Pin
Host Request
Signals
HRRQ
HREQ
HTRQ
HREQ Pin
HRRQ
HRRQ Pin
No interrupts
RXDF request enabled
No interrupts
RXDF request enabled
)