Configuring Clock Synchronization - Huawei SmartAX MA5603T Configuration Manual

SmartAX MA5600T/MA5603T/MA5608T Multi-service
Access Module
Commissioning and Configuration Guide

14.4.9.6 Configuring Clock Synchronization

In this scenario, network-wide clock synchronization is implemented through synchronous
Ethernet clocks.
Prerequisites
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Context
The clock synchronization scheme of a small-cell base station can be synchronous Ethernet
(frequency synchronization) or IEEE 1588v2 (time synchronization). This topic uses the
synchronous Ethernet as an example to describe how to configure clock synchronization. For
IEEE 1588v2 time synchronization configurations, see
Synchronization.
Data Plan
Configuration
Item
GIU upstream board Port: 0/19/0
DSLAM (MA5616)
port
ONU Port
Procedure
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Issue 01 (2014-04-30)
The clock daughter board CKMC/CKMD of the SCU board must be in position.
The ethernet upstream board must be GICK/GSCA (GE port) or X2CS (10GE port)/SPUF
(need an independent service board slot).
The upstream MAN PSN of the OLT must feature the capability of Ethernet
synchronization.
Data
Upstream port: 0/0/1
UNI interface: 0/3/0
Upstream port: 0/0/0
UNI interface: 0/1/0
Configure the OLT-side clock.
1. Configure a system clock source.
Use the Ethernet line clock input from GIU port 0/19/0 as the system clock. Set the
index of the system clock to 0 and priority to 0 (highest priority).
huawei(config)#clock source 0 0/19/0
huawei(config)#clock priority system 0
2. Query the configurations and status of the system clock source.
Run the display clock source system command to query the configurations and status
of the system clock source. Ensure that the configurations of the system clock source
are correct and the status of the system clock source is Normal.
huawei(config)#display clock source system
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14 FTTM Configuration (Base Station Access)
14.3.6 Configuring 1588v2 Clock
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