In Alphabetical Order - Epson 6200A Core Cpu Manual

3 INSTRUCTION SET

3.1.2 In alphabetical order

Mne-
Page Operand
monic
B A
28 ACPX MX, r 1 1
28 ACPY MY, r 1 1
29 ADC r, i 1 1
29 r, q 1 0
30 XH, i 1 0
30 XL, i 1 0
31 YH, i 1 0
31 YL, i 1 0
32 ADD r, i 1 1
32 r, q 1 0
33 AND r, i 1 1
33 r, q 1 0
34 CALL s 0 1
34 CALZ s 0 1
35 CP r, i 1 1
35 r, q 1 1
36 XH, i 1 0
36 XL, i 1 0
37 YH, i 1 0
37 YL, i 1 0
38 DEC Mn 1 1
38 SP 1 1
39 DI 1 1
39 EI 1 1
40 FAN r, i 1 1
40 r, q 1 1
41 HALT 1 1
41 INC Mn 1 1
42 SP 1 1
42 X 1 1
Y 1 1
43
43 JPBA 1 1
44 JP C, s 0 0
44 NC, s 0 0
45 NZ, s 0 1
45 s 0 0
46 Z, s 0 1
46 LBPX MX, e 1 0
20
Operation Code
9 8 7 6 5 4 3 2 1 0
1 1 0 0 1 0 1 0 r1 r0
1 1 0 0 1 0 1 1 r1 r0
0 0 0 1 r1 r0 i3 i2 i1 i0
1 0 1 0 0 1 r1 r0 q1 q0
1 0 0 0 0 0 i3 i2 i1 i0
1 0 0 0 0 1 i3 i2 i1 i0
1 0 0 0 1 0 i3 i2 i1 i0
1 0 0 0 1 1 i3 i2 i1 i0
0 0 0 0 r1 r0 i3 i2 i1 i0
1 0 1 0 0 0 r1 r0 q1 q0
0 0 1 0 r1 r0 i3 i2 i1 i0
1 0 1 1 0 0 r1 r0 q1 q0
0 0 s7 s6 s5 s4 s3 s2 s1 s0
0 1 s7 s6 s5 s4 s3 s2 s1 s0
0 1 1 1 r1 r0 i3 i2 i1 i0
1 1 0 0 0 0 r1 r0 q1 q0
1 0 0 1 0 0 i3 i2 i1 i0
1 0 0 1 0 1 i3 i2 i1 i0
1 0 0 1 1 0 i3 i2 i1 i0
1 0 0 1 1 1 i3 i2 i1 i0
1 1 0 1 1 1 n3 n2 n1 n0
1 1 1 1 0 0 1 0 1 1
1 1 0 1 0 1 0 1 1 1
1 1 0 1 0 0 1 0 0 0
0 1 1 0 r1 r0 i3 i2 i1 i0
1 1 0 0 0 1 r1 r0 q1 q0
1 1 1 1 1 1 1 0 0 0
1 1 0 1 1 0 n3 n2 n1 n0
1 1 1 1 0 1 1 0 1 1
1 0 1 1 1 0 0 0 0 0
1 0 1 1 1 1 0 0 0 0
1 1 1 1 1 0 1 0 0 0
1 0 s7 s6 s5 s4 s3 s2 s1 s0
1 1 s7 s6 s5 s4 s3 s2 s1 s0
1 1 s7 s6 s5 s4 s3 s2 s1 s0
0 0 s7 s6 s5 s4 s3 s2 s1 s0
1 0 s7 s6 s5 s4 s3 s2 s1 s0
0 1 e7 e6 e5 e4 e3 e2 e1 e0
Flag
Clock
I D Z C
7 M(X) M(X)+r+C, X
7 M(Y) M(Y)+r+C, Y
7 r r+i3~i0+C
7 r r+q+C
7 XH XH+i3~i0+C
7 XL XL+i3~i0+C
7 YH YH+i3~i0+C
7 YL YL+i3~i0+C
7 r r+i3~i0
7 r r+q
7 r r i3~i0
7 r r q
7 M(SP-1) PCP, M(SP-2)
SP SP-3, PCP
7 M(SP-1) PCP, M(SP-2)
SP SP-3, PCP
7 r-i3~i0
7 r-q
7 XH-i3~i0
7 XL-i3~i0
7 YH-i3~i0
7 YL-i3~i0
7 M(n3~n0)
5 SP SP-1
7 I 0 (Disables Interrupt)
7 I 1 (Enables Interrupt)
7 r i3~i0
7 r q
5 Halt (stop clock)
7 M(n3~n0)
5 SP SP+1
5 X X+1
Y Y+1
5
5 PCB NBP, PCP
5 PCB NBP, PCP
5 PCB NBP, PCP
5 PCB NBP, PCP
5 PCB NBP, PCP
5 PCB NBP, PCP
5 M(X) e3~e0, M(X+1)
EPSON
Operation
X+1
Y+1
PCSH, M(SP-3)
NPP, PCS s7~s0
PCSH, M(SP-3)
0, PCS s7~s0
M(n3~n0)-1
M(n3~n0)+1
NPP, PCSH B, PCSL
NPP, PCS s7~s0 if C=1
NPP, PCS s7~s0 if C=0
NPP, PCS s7~s0 if Z=0
NPP, PCS s7~s0
NPP, PCS s7~s0 if Z=1
e7~e4, X X+2
S1C6200/6200A CORE CPU MANUAL
PCSL+1
PCSL+1
A