Epson 6200A Core Cpu Manual page 60

3 INSTRUCTION SET
LD r,XP
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
LD r,YH
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
54
Load XP into r-register
LD r,XP
r XP
1 1 1 0 1 0 1 0 0 0 r
MSB
V
5
C – Not affected
Z – Not affected
D – Not affected
I – Not affected
Loads the 4-bit page part of index register IX into the r-register.
LD MX,XP
XP register 1111
A register 0010
Memory (MX) 0101
Load YH into r-register
LD r,YH
r YH
1 1 1 0 1 0 1 1 0 1 r
MSB
V
5
C – Not affected
Z – Not affected
D – Not affected
I – Not affected
Loads the four high-order bits of register Y into the r-register.
LD A,YH
YH register 1010
A register 1100
Memory (MY) 1110
r EA0H to EA3H
1 0
LSB
LD A,XP
1111 1111
0010 1111
1111 1111
r EB4H to EB7H
1 0
LSB
LD MY,YH
1010 1010
1010 1010
1110 1010
EPSON
S1C6200/6200A CORE CPU MANUAL