Epson 6200A Core Cpu Manual page 88

3 INSTRUCTION SET
XOR r,q
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
82
Exclusive-OR q-register with r-register
XOR r,q
r r q
1 0 1 0 1 1 1
MSB
IV
7
C – Not affected
Z – Set if the result is zero; otherwise, reset.
D – Not affected
I – Not affected
Performs an exclusive-OR operation between the contents of the q-register and
the contents of the r-register. The result is stored in the r-register.
XOR A,MY
A register 0100
B register 1111
Memory (MX) 0111
Memory (MY) 1000
Z flag 0
MSB
C –
Z –
D –
I –
0 r r q q AE0H to AEFH
1 0 1 0
LSB
XOR MX,B
1100 1100
1111 1111
0111 1000
1000 1000
0
LSB
EPSON
0
S1C6200/6200A CORE CPU MANUAL