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3 INSTRUCTION SET
POP r
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
POP XH
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
64
Pop stack data into r-register
POP r
r
M(SP), SP
SP + 1
1 1 1 1 1 1 0 1
MSB
V
5
C –
Not affected
Z –
Not affected
D –
Not affected
I –
Not affected
Loads the contents of the data memory location addressed by the stack pointer
into the r-register. SP is incremented by 1.
SP
C0
Memory (C0H)
1001
B register
0101
Pop stack data into XH
POP XH
XH
M(SP), SP
SP + 1
1 1 1 1 1 1 0 1
MSB
VI
5
C –
Not affected
Z –
Not affected
D –
Not affected
I –
Not affected
Loads the contents of the data memory location addressed by the stack pointer
into XH, the four high-order bits of X. SP is incremented by 1.
SP
CE
Memory (CEH)
0110
XH register
0010
0 0 r
r
FD0H to FD3H
1
0
LSB
M(SP) =
POP B
C1
1001
1001
0 1 0 1
FD5H
LSB
M(SP) =
POP XH
CF
0110
0110
EPSON
3
2
1
0
2
2
2
2
0
2
1
2
= r-register
2
2
2
3
3
2
1
0
2
2
2
2
0
2
1
2
= XH
2
2
3
2
S1C6200/6200A CORE CPU MANUAL
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