Inc Y; Increment Y-Register By; Indirect Jump Using Registers A And B - Epson 6200A Core Cpu Manual

INC Y

Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
JPBA
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
S1C6200/6200A CORE CPU MANUAL

Increment Y-register by 1

INC Y
Y Y + 1
1 1 1 0 1 1 1 1 0 0 0 0
MSB
VI
5
C – Not affected
Z – Not affected
D – Not affected
I – Not affected
Increments the contents of register Y by 1. This operation does not affect the
flags.
Y register 1011 0111
C flag 1
Z flag 0

Indirect jump using registers A and B

JPBA
PCB NBP, PCP NPP, PCSH
1 1 1 1 1 1 1 0 1 0 0 0
MSB
VI
5
C – Not affected
Z – Not affected
D – Not affected
I – Not affected
Uses the contents of a- and b-registers to specify the destination address of the
jump. The b-register contains the four high-order bits of the address and the a-
register contains the four low-order bits of the address.
PSET 15H
PCB 0
NBP 0
PCP 1000
NPP 0001
PCS 1001 0000
A register 0110
B register 0000
EF0H
LSB
INC Y
1011 1000
1
0
B, PCSL
FE8H
LSB
JPBA
0
1
1000 0101
0101 0101
1001 0001 0000 0110
0110 0110
0000 0000
EPSON
3 INSTRUCTION SET
A
1
1
43