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3 INSTRUCTION SET
SLP
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
SUB r,q
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
80
Sleep
SLP
Stop CPU and peripheral oscillator
1 1 1 1 1 1 1 1
MSB
VI
5
C –
Not affected
Z –
Not affected
D –
Not affected
I –
Not affected
Stops the CPU and the peripheral oscillator. When an interrupt occurs PCP and
PCS are pushed onto the stack as the return address and the interrupt service
routine is executed.
Instruction
SLP
Interrupt
NOP5
Subtract q-register from r-register
SUB r,q
r
r - q
1 0 1 0 1 0 1 0
MSB
IV
7
C –
Set if a borrow is generated; otherwise, reset.
Z –
Set if the result is zero; otherwise, reset.
D –
Not affected
I –
Not affected
Subtracts the contents of the q-register from the r-register.
A register
1100
B register
0011
C flag
1
Z flag
0
1 0 0 1
FF9H
LSB
State
PCP
RUN
0100 0011 0000
0100 0011 0001
SLEEP
RUN
0001 0000 0001
r
r
q
q
AA0H to AAFH
1
0
1
0
LSB
SUB A,B
1001
0011
0
0
EPSON
PCS
I flag
1
1
0
S1C6200/6200A CORE CPU MANUAL
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