HP 3000 III Series Manual page 195

System Microcode
Table 5-4. Function Field' Code Definitions (Continued)
I
r----
I
Field
I
Label and Name
I
Code
I
I I
Des cr ip t ion
CTSD (Cont)
CTSS 11100
(Controlled T-Bus
Sh ift Single)
DCAD 11110
(Decimal Add)
DVSB 01000
(Divide-Subtract)
word. Regardless of the direction
of the shift, both the SPI and SP3
Registers are shifted left and
right respectively.
The R-Bus Register content is added
to the S-Bus Register content and
the resul t is placed on the T-Bus.
The T-Bus is then shifted left or
right as specified by the Shift
fie Id code (SRI or SLl). The type
of shift is determined by the con-
tent of the CIR as follows:
If CIR(7)
=
1 then circular shift
If CIR(7:8)
=
01 then logical shift
If CIR(7:8)
=
00 then arithmetic
shift
The contents of the' R- and S-Bus
Registers are added and the result
is placed into the Decimal Correct-
or Adder. The Decimal Corrector
Adder output is placed on the D-
Bus.
The Function field code DVSB per-
forms the subtract, shift, and test
necessary to execute a divide algo-
rithm. The R- and S-Bus fields of
the microinstruction are coded so
that initially the 16-bit divisor
is in the S-Bus Register and the
most significant 16-bits of the
dividend are in the R-Bus Reg i ste r.
The least significant 16-bits of
dividend are in the SPI Register.
Both divisor and dividend must be
positive numbers upon execution of
the DVSB code and Flag 2 (F2) must
be 0 (cleared).
An
SLI code in the
Shift field of the microinstruction
directs the left shift on the T-
Bus. The following algorithm,is
then executed repeatedly to perform
the complete divide.
5-15