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MCU/Main Memory Overview
--~-_._--~--~~-~-~.-.-----~-----~._~----_.-._.---_._--
-------.
I
ADDRESS
I
EPROF<
TYPE
I EPROR I
---~----~--~.-._-~_.~--------_.-~--.----------.--------
I CONTPOLlJFR
I HUAPD I ROW I
TYPF.
BIT
CHIP
I COUNT I
---
.•
_.~_
..
~----_
..
_-----~._.~-----._-----~--.-----._- ---_
.. ---
I
I
I
I
controller
I
I
board
I
J
T
I
Trow
1
I
I
I
I
type
bit
chip
I
I
I
I
cnt
I
I
I
I
_
..
-.~-~_._~~-~-._~---~--------~_._-._~----------~---- --------
where:
controller
The memory controller where the error occurred, shown as CONTROLLER A or
CONTROLLER B.
board
The memory module board on which the error occurred, indicated by a digit from
o
through 3.
row
The row designation on the board in which the failing chip is located, indicated as
a digit from 0 through 7.
type
Type of error detected, as follows:
CHECK
Check bit error.
DATA
Data bit error.
MULTIPLE BIT
Error in more than one bit.
ERROR
FORCED D.E.W.
Forced Double Error Write. Indicated data parity error on
the data transmitted to memory.
MISSING ARRAY
Non-responding array board.
BOARD
bit
If type
=
CHECK, bit refers to the failing check bit - CO through C5.
If type
=
DATA, bit refers to the failing data bit -
0
through 15.
chip
Chip on which error occurred, in format:
Un
The variables n is a digit indicating the chip number.
~nt
The number of logging intervals during which this error was detected at least once.
NOTE
This value does not represent the number of times that an
error was actually detected.
Figure 6-8.
MEMLOGAN Table
6-22

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