HP 3000 III Series Manual page 220

System Microcode
Table 5-9. Skip Field Code Definitions (Continued)
r------T--------------.-.--·~------·-I
I
Fie ld
I I
Label and Name
I
Code
I
Oeser iption
I
------~
--I_---_-
I_~._.
. .
~ ~.
.__ I
NEXT (Cont)
NF 1
(Not Flag
1)
NF2
(Not Flag 2)
NOFL
(Not Overflow)
01101
01111
00111
current instruction. Time period c
mayor may not be present depending
on the length of the instruction.
Time period d is the last line of
the current instruction. It initi-
ates a next instruction prefetch,
transfers NIR to CIR, and applies
the address on the VBUS (normally
using the LUT output) to the ROM
input. The ROM word at this ad-
dress is stored in RANKI. In addi-
tion, the NOP2 FF is set. Time
period e is used to increment the
P
Register, transfer RANKI to RANK2,
and, if the new instruction is a
memory-reference type, load the R-
and S-Bus Registers wi th the Pre-
adder output and the proper base
register. This is also the select
cycle for the next instruction pre-
fetch if there is no MCU conflict.
During time period f,the first line
of the new instruction is executed.
The above is the normal sequence of
operation of NEXT. This sequence is
modi fied in the eve nt an inte r r upt
is pending or the microcode line is
" •.• DATA NEXT". NEXT also clears
Fl, F2, F3, CNTR, Subroutine Flag
FF,
and the ABS-Bank Re gi ste r.
The SklP field code NFl sets the
NOP2 FF if Flag 1 FF is cleared.
The Skip field code NF2 sets the
NOP2 FF if Flag 2 FF is cleared.
The Skip field code NOFL sets the
NOP2 FF if the ALU overflow bit is
not a logic 1. Causes conditional
jump and JSB to be two-cycle in-
structions.
5-40