HP 3000 III Series Manual page 43

System/CPU Overview
Q-plus relative addressing. (Q separates the data of a calling
program or subprogram from the data of a called subprogram.)
Since the four TOS elements are the most frequently used, there
are four corresponding CPU registers (RA, RB, RC, and RD) that
can at various times contain these four elements. The use of the
four CPU registers increases stack operation execution speed by
reducing the number of memory references needed when manipulating
data at or near TOS. The four CPU registers are implicitly ac-
cessed by many of the machine instructions and whenever stack
locations S, S-l, S-2, or S-3 are specifically referenced. (Refer
to paragraphs 2-96 and 2-97.) Dur ing execution, data stacks are
automatically expanded by the opera ting system up to a maximum of
32K words.
The system is also capable of operating in a split-stack mode.
(Refer to paragraph 2-64.) In split-stack mode, the DB Register
points to the current extra data segment and the other stack reg-
isters continue to point to the stack data segment. This is par-
ticularly efficient for system routines with tables in system
data segments. In split-stack mode, these data segments can be
accessed relative to the DB Register while using the other stack
registers for computation. In addition to split-stack mode, the
system contains instructions for moving data between data seg-
ments. These instructions cause an "absence trap" if either of
the required data segments is not present in Main Memory. There-
fore, the sys tern can access very large address spaces outside of
the stack and can provide buffering and other data storage facil-
ities without having to reserve space for these functions within
the stack data segment.
2-21. CPU Registers
The computer system contains 38 special purpose registers which
perform the specific functions summarized in table 2-3. Since
all addressing of code and data segments is accomplished relative
to hardware address registers, the segments can be dynamically
relocated in memory by simply changing the register base
addresses. (The few instances where absolute addresses are re-
quired are privileged operations handled by the operating
system.) Several of the hardware registers are used for defining
the limits and operating elements of the code and data segments.
As shown in figure 2-4, four of the CPU registers point to loca-
tions in a code segment and eight of the CPU registers point to
locations in a data segment. It should be noted that there will
normally be several segments in Main Memory at one time, but only
one code segment and one data segment will be active at any given
time. The CPU registers always point to the currently active
segment. The functions of the CPU segment pointer registers are
discussed in paragraphs 2-22 and 2-23. The remaining special
purpose registers will be discussed later in this manual.
2-11