Fujitsu F2MC-8L F202RA Hardware Manual page 190

CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER
Table 8.4-2 Explanation of Functions of Each Bit in Timer 0 Control Register (TCR0)
Bit name
TIF0:
bit7 Compare match
detection flag bit
TFCR0:
bit6 Compare match
detection flag clear bit
T0IEN:
bit5 Interrupt request enable
bit
CINV:
bit4
Count clock selection bit
bit3 TCS02, TCS01, TCS00:
to Clock source selection
bit1 bits
TSTR0:
bit0
Timer start bit
Note:
When using only timer 0 of the 8/16-bit capture timer/counter in the 8-bit mode, set a value other than
111
B
Using timer 0 with setting value TCS12, TCS11, TCS10 = 111
174
• 8-bit mode
When the counter value of timer 0 matches the value (comparator data latch)
set in the timer 0 data register (TDR0), this bit is set to "1".
• 16-bit mode
When the counter value of timer 0 matches the value set in TDR0 and the
counter value of timer 1 matches the value set in TDR1, this bit is set to "1".
• An interrupt request is output when this bit and the interrupt request enable bit
(T0IEN) are "1".
• This bit is used to clear the compare match detection flag bit (TIF0). When this
bit is set to "1", the compare match detection flag is cleared. The flag is not
affected even if this bit is set to "0".
• This bit is used to allow and prohibit interrupt request output to the CPU.
• An interrupt request is output when this bit and the interrupt request enable bit
(T0IEN) are "1".
• This bit is used to select whether to increment the counter at the rising or
falling edge of a clock. When this bit is "0", the counter is incremented at the
falling edge of the clock. When "1", the counter is incremented at the rising
edge.
• These bits are used to select the count clocks to be supplied to the counter.
• Select one clock from the seven internal clocks and one external clock.
• When these bits are 111
operate as the counter function.
Note:
When external clock input is selected (TCS02, TCS01, TCS00 = 111
P33/EC pin must be set in the input port.
• This bit is used to start and stop the counter.
• When this bit is set to "1", the counter is cleared and incremented according to
the selected count clock. When this bit is set to "0", the counter stops its
operation.
When the timer is started (TSTR0 = 0 → 1) in the 16-bit mode, the counters of
•
both timer 0 and timer 1 are cleared.
in the count clock selection bits (TCS12, TCS11, TCS10) of the timer 1 control register (TCR1).
Function
, the external clock is input. In this case, timer 0 can
B
results in a malfunction.
B
), the
B