Dedicated Register; Dedicated Register Configuration; Functions Of The Dedicated Register - Fujitsu F2MC-8L F202RA Hardware Manual

F2mc-8l 8-bit microcontroller
Hide thumbs Also See for F2MC-8L F202RA:
Table of Contents

Advertisement

3.2

Dedicated Register

The dedicated register in the CPU consists of a program counter (PC), two arithmetic
operation registers (A and T), three address pointers (IX, EP, and SP), and program
status (PS) register. The size of each register is 16 bits.

Dedicated Register Configuration

The dedicated register in the CPU consists of seven 16-bit registers. Some registers allow only the lower 8
bits to be used.
Figure 3.2-1 shows the configuration of the dedicated register.
Initial value
FFFD
H
Undefined
Undefined
Undefined
Undefined
Undefined
Flag I = 0
IL1 and IL0 = 11
The other bits are undefined.

Functions of the Dedicated Register

● Program counter (PC)
The size of the program counter is 16 bits. It indicates the memory address at which the CPU is currently
handling an instruction. The program counter is updated with an instruction executed, interrupt, or reset.
The initial value specified after the reset operation is the mode data read address (FFFD
● Accumulator (A)
The accumulator is a 16-bit arithmetic operation register. It handles arithmetic operations or data transfer
using data on memory or data in another register such as temporary accumulator (T). The accumulator
allows data in it to be used as a word (16 bits) or bytes (8 bits). When arithmetic operations or data transfer
is handled in the unit of a byte, only the lower 8 bits (AL) of the accumulator are used; the upper 8 bits
(AH) remain unchanged. The initial value specified after the reset operation is undefined.
Figure 3.2-1 Configuration of Dedicated Register
16 bits
PC
:
Program counter
A
:
Accumulator
T
:
Temporary accumulator
IX
:
Index register
EP
:
Extra-pointer
SP
:
Stack pointer
RP
CCR
:
Program status register
PS
Indicates the current instruction stored position.
Temporary register that handles arithmetic operations and
data transfer.
Handles arithmetic operations together with the accumulator.
Indicates index address.
Indicates memory address.
Indicates the current position in the stack.
Stores the register bank pointer and condition code.
CHAPTER 3 CPU
).
H
27

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

F2mc-8l mb89202Mb89202/f202ra series

Table of Contents