Fujitsu F2MC-8L F202RA Hardware Manual page 404

APPENDIX B Overview of the Instructions
● MULU A
This instruction multiplies AL (the lower eight bits of accumulator) by TL (the lower eight bits of the
temporary accumulator) without a sign and stores the results in 16 bits length to A. The contents of T
(temporary accumulator) remain as they are. For the operation, the contents of AH (the higher eight bits of
accumulator) and TH (the higher eight bits of temporary accumulator) before the execution are not used.
Take care when using a branch based on the result of multiplication because the flags were not changed.
Figure B.2-3 shows an overview.
● DIVU A
This instruction divides T of 16 bits by AL of 8 bits without a sign, stores the results in 8 bits to AL, and
stores the remainder of 8 bits to TL. Both AH and TH become 0. For the operation, the contents of AH
before execution are not used. If the results exceed 8 bits, they are not guaranteed. Also, the fact that the
results exceeded 8 bits is not indicated. So when using data units that may cause this type of situation,
judge them in advance.
Take care when using a branch based on the result of division, because the flags were not changed.
Figure B.2-4 shows an overview.
388
Figure B.2-3 MULU A
(Before execution)
5678
A
H
1234
T
H
Figure B.2-4 DIVU A
(Before execution)
5678
A
H
1862
T
H
(After execution)
1860
A
H
1234
T H
(After execution)
0034
A
H
0002
T
H