Fujitsu F2MC-8L F202RA Hardware Manual page 393

Table A-1 I/O Map (2 / 4)
Register
Address
abbreviation
0018
BZCR
H
0019
TCCR
H
001A
TCR1
H
001B
TCR0
H
001C
TDR1
H
001D
TDR0
H
001E
TCPH
H
001F
TCPL
H
0020
TCR2
H
0021
H
0022
CNTR
H
0023
COMR
H
0024
EIC1
H
0025
EIC2
H
0026
H
0027
H
0028
SMC
H
0029
SRC
H
002A
SSD
H
SIDR
002B
H
SODR
002C
UPC
H
002D
H
to
002F
H
0030
ADC1
H
0031
ADC2
H
0032
ADDH
H
0033
ADDL
H
Register name
Buzzer register
Capture control register
Timer 1 control register
Timer 0 control register
Timer 1 data register
Timer 0 data register
Capture data register H
Capture data register L
Timer output control register
PWM control register
PWM compare register
External interrupt 1 control register 1
External interrupt 1 control register 2
Serial mode control register
Serial rate control register
Serial status and data register
Serial input data register
Serial output data register
Clock divided cycle selection register
A/D control register 1
A/D control register 2
A/D data register H
A/D data register L
Read/write
Vacancy
Vacancy
Vacancy
Initial value
R/W -----000
R/W 00000000
R/W 000-0000
R/W 00000000
R/W XXXXXXXX
R/W XXXXXXXX
R XXXXXXXX
R XXXXXXXX
R/W ------00
R/W 0-000000
W XXXXXXXX
R/W 00000000
R/W ----0000
R/W 00000-00
R/W --011000
R/W 00100-1X
R XXXXXXXX
W XXXXXXXX
R/W ----0010
R/W -0000000
R/W -0000001
R ------XX
R XXXXXXXX
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