Fujitsu F2MC-8L F202RA Hardware Manual page 200

CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER
Notes:
• When the counter value matches the TDR0 value and at the same time the counter stops (TCR0:
TSTR0 = 0), the TIF0 bit is not set.
If the T0IEN bit is set to "1" (enable) when the TIF0 bit is "1", an interrupt request is generated
immediately.
• If the compare register value is 0000
interrupt. Therefore, when using interrupts, set a value greater than or equal to 0001
16-bit capture timer/counter also cannot generate an interrupt if the counter function detects the
0000
■
Register and Vector Table Related to 8/16-bit Capture Timer/Counter of Interrupts
Table 8.5-2 Register and Vector Table Related to 8/16-bit Capture Timer/counter of Interrupts
Timer/counter
function
Capture function
For interrupt operation, see Section "3.4.2 Steps in the Interrupt Operation ".
184
or 00 width.
H H
Interrupt level setting register
Interrupt
name
Register
ILR1 (007B
IRQ3
ILR2 (007C
IRQ4
or 00 , the 8/16-bit capture timer/counter cannot generate an
H H
Setting bit
)
L31 (bit7) L30 (bit6)
H
)
L41 (bit1) L40 (bit0)
H
or 01 . The 8/
H H
Vector table address
Higher Lower
FFF4 FFF5
H H
FFF2 FFF3
H H