A/D Control Register 2 (Adc2) - Fujitsu F2MC-8L F202RA Hardware Manual

CHAPTER 12 A/D CONVERTER
12.4.2

A/D Control Register 2 (ADC2)

A/D control register 2 (ADC2) is used to select an input clock, enable and disable an
interrupt and continuous activation.
■
A/D Control Register 2 (ADC2)
Address
bit7
0031
RESV4 RESV3 ADCK
H
R/W : Readable/ Writable
: Unused
: Initial value
268
Figure 12.4-3 A/D Control Register 2 (ADC2)
bit6 bit5 bit4 bit3
ADIE RESV2
R/W R/W R/W R/W
RESV1
Be sure to write "1" to this bit.
1
EXT
0
Enables activation by setting the AD bit in the ADC1 register.
Enables continuous activation through the clock selected in the
1
ADCK bit.
RESV2
Be sure to write "0" to this bit.
0
ADIE
0
Disables the interrupt request output.
1 Enables the interrupt request output.
ADCK
Enabled only at continuous activation (EXT = 1)
From the time-base timer output (2
0
1
From the 8/16-bit capture timer/counter output (TO).
RESV3 RESV4
0
bit2 bit1 bit0
Initial value
-0000001
EXT RESV1
R/W R/W R/W
Reserved bit
Bit for enabling continuous activation
Reserved bit
Enabling an interrupt request bit
Selecting an input clock bit
Reserved bits
Be sure to write 00
0 B
B
8
/F ).
CH
to these bits.