Philips LPC2119 User Manual page 160

Philips Semiconductors
ARM-based Microcontroller
In the following register tables, the column "Reset Value" shows how a hardware reset affects each bit or field, while the column
"RM Set" indicates how each bit or field is affected if software sets the RM bit, or RM is set because of a Bus-Off condition. Note
that while hardware reset sets RM, in this case the setting noted in the "Reset Value" column prevails over that shown in the "RM
Set" column, in the few bits where they differ. In both columns, X indicates the bit or field is unchanged.
Mode Register (CANMOD - 0xE00x x000)
This register controls the basic operating mode of the CAN Controller. Bits not listed read as 0 and should be written as 0.
Table 124: CAN Mode Register (CANMOD - 0xE00x x000)
CANMOD Name Function
0: the CAN Controller operates, and certain registers can not be written.
0 RM
1: Reset Mode -- CAN operation is disabled, and writable registers can be written.
0: the CAN controller acknowledges a successfully-received message on its CAN.
1: Listen Only Mode -- the controller gives no acknowledgment on CAN, even if a
1 LOM message is successfully received. Messages cannot be sent, and the controller
operates in "error passive" mode. This mode is intended for software bit rate
detection and "hot plugging".
0: a transmitted message must be acknowledged to be considered successful.
2 STM 1: Self Test Mode -- the controller will consider a Tx message successful if there is
no acknowledgment. Use this state in conjunction with the SRR bit in CANCMR.
0: the priority of the 3 Transmit Buffers depends on their CAN IDs.
3 TPM
1: the priority of the 3 Transmit Buffers depends on their Tx Priority fields.
0: normal operation
4 SM 1: Sleep Mode -- the CAN controller sleeps if it is not requesting an interrupt, and
there is no bus activity. See the Sleep Mode description on page 170.
0: RX and TX pins are Low for a dominant bit.
5 RPM
1: Reverse Polarity Mode -- RX pins are High for a dominant bit.
0: normal operation
7 TM
1: Test Mode. The state of the RX pin is clocked onto the TX pin.
Note 1: The LOM and STM bits can only be written if the RM bit is 1 prior to the write operation.
CAN Controllers and Acceptance Filter
LPC2119/2129/2292/2294
160
Preliminary User Manual
Reset Value RM Set
1 1
0 X
0 X
0 X
0 0
0 0
0 0
January 08, 2004