Register Description - Philips LPC2119 User Manual

Arm-based microcontroller
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ARM-based Microcontroller

REGISTER DESCRIPTION

The ETM contains 29 registers as shown in Table 226. below. They are described in detail in the ARM IHI 0014E document
published by ARM Limited, which is available via the Internet at http://www.arm.com.
Table 226: ETM Registers
Register
encoding
000 0000
ETM Control
000 0001
ETM Configuration Code
000 0010
Trigger Event
000 0011
Memory Map Decode Control
000 0100
ETM Status
000 0101
System Configuration
000 0110
Trace Enable Control 3
000 0111
Trace Enable Control 2
000 1000
Trace Enable Event
000 1001
Trace Enable Control 1
000 1010
FIFOFULL Region
000 1011
FIFOFULL Level
000 1100
ViewData event
000 1101
ViewData Control 1
000 1110
ViewData Control 2
000 1111
ViewData Control 3
001 xxxx
Address Comparator 1 to 16 Holds the address of the comparison
010 xxxx
Address Access Type 1 to 16 Holds the type of access and the size
000 xxxx
100 xxxx
101 00xx
Initial Counter Value 1 to 4
101 01xx
Counter Enable 1 to 4
101 10xx
Counter reload 1 to 4
101 11xx
Counter Value 1 to 4
110 00xx
Sequencer State and Control Holds the next state triggering events.
110 10xx
External Output 1 to 4
110 11xx
111 0xxx
111 1xxx
Embedded Trace Macrocell
Name
Controls the general operation of the ETM
Allows a debugger to read the number of each type of resource
Holds the controlling event
Eight-bit register, used to statically configure the memory map
decoder
Holds the pending overflow status bit
Holds the configuration information using the SYSOPT bus
Holds the trace on/off addresses
Holds the address of the comparison
Holds the enabling event
Holds the include and exclude regions
Holds the include and exclude regions
Holds the level below which the FIFO is considered full
Holds the enabling event
Holds the include/exclude regions
Holds the include/exclude regions
Holds the include/exclude regions
reserved
-
reserved
-
Holds the initial value of the counter
Holds the counter clock enable control and event
Holds the counter reload event
Holds the current counter value
Holds the controlling events for each output
Reserved
-
Reserved
-
Reserved
-
LPC2119/2129/2292/2294
Description
256
Preliminary User Manual
Access
Read/Write
Read Only
Write Only
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January 08, 2004

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