Philips LPC2119 User Manual page 89

Philips Semiconductors
ARM-based Microcontroller
Table 55: Pin description for LPC2119/2129
Pin LQFP64
Type
Name Pin #
I
13 I
O
I
14 I
O
I
15 I
I
P1.16
I/O
to
P1.31
16 O
12 O
8 O
4 O
48 O
44 O
40 O
36 O
32 O
28 I
I/O
24
64 O
60 I
Pin Configuration
P0.28 AIN1 A/D converter, input 1. This analog input is always connected to its pin.
CAP0.2 Capture input for TIMER0, channel 2.
MAT0.2 Match output for TIMER0, channel 2.
P0.29 AIN2 A/D converter, input 2. This analog input is always connected to its pin.
CAP0.3 Capture input for TIMER0, channel 3.
MAT0.3 Match output for TIMER0, channel 3.
P0.30 AIN3 A/D converter, input 3. This analog input is always connected to its pin.
EINT3 External interrupt 3 input.
CAP0.0 Capture input for TIMER0, channel 0.
Port 1: Port 1 is a 32-bit bi-directional I/O port with individual direction controls for each bit. The
operation of port 1 pins depends upon the pin function selected via the Pin Connect Block.
Only pins 16 through 31 of port 1 are available.
P1.16 TRACEPKT0Trace Packet, bit 0. Standard I/O port with internal pull-up.
P1.17 TRACEPKT1Trace Packet, bit 1. Standard I/O port with internal pull-up.
P1.18 TRACEPKT2Trace Packet, bit 2. Standard I/O port with internal pull-up.
P1.19 TRACEPKT3Trace Packet, bit 3. Standard I/O port with internal pull-up.
P1.20 TRACESYNCTrace Synchronization. Standard I/O port with internal pull-up. LOW on
this pin while RESET is LOW enables pins P1.25:16 to operate as a
Trace port after reset.
P1.21 PIPESTAT0 Pipeline Status, bit 0. Standard I/O port with internal pull-up.
P1.22 PIPESTAT1 Pipeline Status, bit 1. Standard I/O port with internal pull-up.
P1.23 PIPESTAT2 Pipeline Status, bit 2. Standard I/O port with internal pull-up.
P1.24 TRACECLK Trace Clock. Standard I/O port with internal pull-up.
P1.25 EXTIN0 External Trigger Input. Standard I/O with internal pull-up.
P1.26 RTCK Returned Test Clock output. Extra signal added to the JTAG port.
Assists debugger synchronization when processor frequency varies.
Bi-directional pin with internal pullup. LOW on thispin while RESET is
LOW enables pins P1.31:26 to operate as a Debug port after reset.
P1.27 TDO Test Data out for JTAG interface.
P1.28 TDI Test Data in for JTAG interface.
LPC2119/2129/2292/2294
Description
89
Preliminary User Manual
January 08, 2004