Memory Accelerator Module Operating Modes - Philips LPC2119 User Manual

Philips Semiconductors
ARM-based Microcontroller
In order to preclude the possibility of stale data being read from the Flash memory, the MAM holding latches are automatically
invalidated at the beginning of any Flash programming or erase operation. Any subsequent read from a Flash address will cause
a new fetch to be initiated after the Flash operation has completed.

MEMORY ACCELERATOR MODULE OPERATING MODES

Three modes of operation are defined for the MAM, trading off performance for ease of predictability:
0) MAM off. All memory requests result in a Flash read operation (see note 2 below). There are no instruction prefetches.
1) MAM partially enabled. Sequential instruction accesses are fulfilled from the holding latches if the data is present. Instruction
prefetch is enabled. Non-sequential instruction accesses initiate Flash read operations (see note 2 below). This means that all
branches cause memory fetches. All data operations cause a Flash read because buffered data access timing is hard to predict
and is very situation dependent.
2) MAM fully enabled. Any memory request (code or data) for a value that is contained in one of the corresponding holding latches
is fulfilled from the latch. Instruction prefetch is enabled. Flash read operations are initiated for instruction prefetch and code or
data values not available in the corresponding holding latches.
Table 35: MAM Responses to Program Accesses of Various Types
Program Memory Request Type
Sequential access, data in MAM latches
Sequential access, data not in MAM latches
Non-Sequential access, data in MAM latches
Non-Sequential access, data not in MAM latches
Table 36: MAM Responses to Data and DMA Accesses of Various Types
Data Memory Request Type
Sequential access, data in MAM latches
Sequential access, data not in MAM latches
Non-Sequential access, data in MAM latches
Non-Sequential access, data not in MAM latches
1. Instruction prefetch is enabled in modes 1 and 2.
2. The MAM actually uses latched data if it is available, but mimics the timing of a Flash read operation. This saves power while
resulting in the same execution timing. The MAM can truly be turned off by setting the fetch timing value in MAMTIM to one
clock.
Memory Accelerator Module (MAM)
0
2
Initiate Fetch Use Latched Data
Initiate Fetch Initiate Fetch
2
Initiate Fetch Initiate Fetch
Initiate Fetch Initiate Fetch
0
2
Initiate Fetch Initiate Fetch
Initiate Fetch Initiate Fetch
2
Initiate Fetch Initiate Fetch
Initiate Fetch Initiate Fetch
72
Preliminary User Manual
LPC2119/2129/2292/2294
MAM Mode
1
1
Use Latched Data
1
Initiate Fetch
1, 2
Use Latched Data
1
Initiate Fetch
MAM Mode
1
2
Use Latched Data
Initiate Fetch
2
Use Latched Data
Initiate Fetch
January 08, 2004
2
1
1
1
1
2